Make our code more similar to OpenBSD's resume code.
Remove the VBIOS stuff - setting vesa modes from the bootloader failed
for my laptop, so I suspect this won't work either.
OpenBSD doesn't do this, too.

Restore more MSRs - like openbsd.

Index: arch/amd64/acpi/acpi_wakecode.S
===================================================================
RCS file: /cvsroot/src/sys/arch/amd64/acpi/acpi_wakecode.S,v
retrieving revision 1.13
diff -u -r1.13 acpi_wakecode.S
--- arch/amd64/acpi/acpi_wakecode.S	24 Jul 2016 13:04:58 -0000	1.13
+++ arch/amd64/acpi/acpi_wakecode.S	18 Nov 2018 06:26:26 -0000
@@ -61,6 +61,21 @@
  *
  *	FreeBSD: src/sys/i386/acpica/acpi_wakecode.S,v 1.1 2001/07/20 06:07:31 takawata Exp
  */
+/*
+ * Copyright (c) 2008, 2009 Mike Larkin <mlarkin@openbsd.org>
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
 
 #define _LOCORE
 
@@ -72,6 +87,7 @@
 
 	.text
 	.code16
+	.align 4, 0xcc
 	.org 0	/* ACPI spec says: cs==(phys>>8), ip==(phys&0x000F) */
 	.globl wakeup_16
 wakeup_16:
@@ -83,64 +99,26 @@
 	movw	%cs,%ax
 	movw	%ax,%ds
 	movw	%ax,%ss
+	movw	%ax,%es
+	addr32 lidtl	tmp_idt
 
 	/* Small call stack */
-	mov	$0x1000,%sp
+	mov	$0x0FFE,%sp
 
 	/* Clear flags */
 	pushl	$0
 	popfl
 
-	/* Only beep on reset if machdep.acpi_beep_on_reset=1 */
-	cmpb	$1,WAKEUP_beep_on_reset
-	jne	1f
-	movb	$0xc0,%al
-	outb	%al,$0x42
-	movb	$0x04,%al
-	outb	%al,$0x42
-	inb	$0x61,%al
-	orb	$0x3,%al
-	outb	%al,$0x61
-1:
-
-	/* Only reset the VBIOS if machdep.acpi_vbios_reset=1 */
-	cmpb	$1,WAKEUP_vbios_reset
-	jne	1f
-
-	/* Kick the VBIOS. */
-	lcall	$0xc000,$3
-
-	/* Reset registers in case the VBIOS changed them. */
-	movw	%cs,%ax
-	movw	%ax,%ds
-	movw	%ax,%ss
-
-	/* If we need to restore a VESA VBE mode, do it now */
-	cmpb	$0,WAKEUP_vesa_modenum
-	je	1f
-	movw	WAKEUP_vesa_modenum,%bx
-	orw	$0x4000,%bx
-	movw	$0x4f02,%ax
-	int	$0x10
-
-	movw	%cs,%ax
-	movw	%ax,%ds
-	movw	%ax,%ss
-1:
-
-	/* Disable beep again if machdep.acpi_beep_on_reset=1 */
-	cmpb	$1,WAKEUP_beep_on_reset
-	jne	1f
-	inb	$0x61,%al
-	andb	$0xfc,%al
-	outb	%al,$0x61
+	/* Flush instruction prefetch queue */
+	jmp	1f
+1:	jmp	1f
 1:
 
 	/* Load temporary 32bit GDT */
 #ifdef __clang__
 	lgdt	tmp_gdt
 #else
-	data32 addr32 lgdt	tmp_gdt
+	addr32 lgdtl	tmp_gdt
 #endif
 
 	/* Enable protected mode without paging */
@@ -158,7 +136,7 @@
 	ljmpl	$0x8,$wakeup_32 + ACPI_WAKEUP_ADDR
 
 	.code32
-	.align	16
+	.align	16, 0xcc
 wakeup_32:
 	/*
 	 * Switched to protected mode w/o paging
@@ -166,20 +144,22 @@
 	nop
 
 	/* Set up segment registers and initial stack for protected mode */
-	movw	$0x10,%ax
+	movw	$GSEL(GDATA_SEL,SEL_KPL),%ax
 	movw	%ax,%ds
 	movw	%ax,%ss
+	movw	%ax,%es
+	movw	%ax,%gs
+	movw	%ax,%fs
 
-	movl	$(ACPI_WAKEUP_ADDR + 4096),%esp
-
-	/* First, reset the PSL. */
-	pushl	$PSL_MBO
-	popfl
+	addl	$(ACPI_WAKEUP_ADDR + 4096),%esp
 
 	/* Enable PAE and potentially PSE */
 	movl	$(CR4_PAE|CR4_OSFXSR|CR4_OSXMMEXCPT|CR4_PSE),%eax
 	movl	%eax,%cr4
 
+	/* Switch to temporary 64bit GDT */
+	lgdt	tmp_gdt64 + ACPI_WAKEUP_ADDR
+
 	/*
 	 * First switch to Long Mode.  Do not restore the original
 	 * MSR EFER value directly, as enabling the NX bit without
@@ -208,13 +188,11 @@
 	jmp	1f
 1:
 
-	/* Switch to temporary 64bit GDT */
-	lgdt	tmp_gdt64 + ACPI_WAKEUP_ADDR
-
 	/* Switch to long mode using intersegmental jump. */
 	ljmp	$0x8, $wakeup_64 + ACPI_WAKEUP_ADDR
 
 	.code64
+	.align 16, 0xcc
 wakeup_64:
 
 	/*
@@ -236,6 +214,12 @@
 	/* Continue with wakeup in the high-level wakeup code */
 	jmp	*%rbx
 
+	.align 8, 0
+tmp_idt:
+	.word	0xffff
+	.long	0
+	.word	0
+
 	.align	8
 tmp_gdt:
 	.word	0xffff
@@ -269,14 +253,17 @@
 	.global WAKEUP_restorecpu
 WAKEUP_restorecpu:	.quad 0
 
-	.global WAKEUP_vbios_reset
-WAKEUP_vbios_reset:	.byte 0
-	.global WAKEUP_vesa_modenum
-WAKEUP_vesa_modenum:	.word 0
-	.global WAKEUP_beep_on_reset
-WAKEUP_beep_on_reset:	.byte 0
-
 	.global WAKEUP_curcpu
 WAKEUP_curcpu:		.quad 0
-	.global WAKEUP_efer
+	.global WAKEUP_apicbase
+WAKEUP_apicbase:	.long 0
+ 	.global WAKEUP_efer
 WAKEUP_efer:		.long 0
+	.global WAKEUP_star
+WAKEUP_star:		.long 0
+	.global WAKEUP_lstar
+WAKEUP_lstar:		.long 0
+	.global WAKEUP_cstar
+WAKEUP_cstar:		.long 0
+	.global WAKEUP_sfmask
+WAKEUP_sfmask:		.long 0
Index: arch/amd64/acpi/acpi_wakeup_low.S
===================================================================
RCS file: /cvsroot/src/sys/arch/amd64/acpi/acpi_wakeup_low.S,v
retrieving revision 1.10
diff -u -r1.10 acpi_wakeup_low.S
--- arch/amd64/acpi/acpi_wakeup_low.S	14 Jul 2018 14:29:40 -0000	1.10
+++ arch/amd64/acpi/acpi_wakeup_low.S	18 Nov 2018 06:26:26 -0000
@@ -57,7 +57,35 @@
 
 	movl	$MSR_EFER,%ecx
 	movl	ACPI_SUSPEND_EFER(%r8),%eax
-	movl	$0,%edx
+	movl	ACPI_SUSPEND_EFER+4(%r8),%edx
+	wrmsr
+
+	/* Restore the rest of the MSRs */
+	/* +#if NLAPIC > 0 */
+	movl	$MSR_APICBASE,%ecx
+	movl	ACPI_SUSPEND_APICBASE(%r8),%eax
+	movl	ACPI_SUSPEND_APICBASE+4(%r8),%edx
+	wrmsr
+	/* +#endif */
+
+	movl	$MSR_STAR,%ecx
+	movl	ACPI_SUSPEND_STAR(%r8),%eax
+	movl	ACPI_SUSPEND_STAR+4(%r8),%edx
+	wrmsr
+
+	movl	$MSR_LSTAR,%ecx
+	movl	ACPI_SUSPEND_LSTAR(%r8),%eax
+	movl	ACPI_SUSPEND_LSTAR+4(%r8),%edx
+	wrmsr
+
+	movl	$MSR_CSTAR,%ecx
+	movl	ACPI_SUSPEND_CSTAR(%r8),%eax
+	movl	ACPI_SUSPEND_CSTAR+4(%r8),%edx
+	wrmsr
+
+	movl	$MSR_SFMASK,%ecx
+	movl	ACPI_SUSPEND_SFMASK(%r8),%eax
+	movl	ACPI_SUSPEND_SFMASK+4(%r8),%edx
 	wrmsr
 
 	movl	$MSR_FSBASE,%ecx
@@ -153,10 +181,30 @@
 	movl	%eax,ACPI_SUSPEND_KGS(%r8)
 	movl	%edx,ACPI_SUSPEND_KGS+4(%r8)
 
+	movl	$MSR_APICBASE,%ecx
+	rdmsr
+	movl	%eax,ACPI_SUSPEND_APICBASE(%r8)
+
 	movl	$MSR_EFER,%ecx
 	rdmsr
 	movl	%eax,ACPI_SUSPEND_EFER(%r8)
 
+	movl	$MSR_STAR,%ecx
+	rdmsr
+	movl	%eax,ACPI_SUSPEND_STAR(%r8)
+
+	movl	$MSR_LSTAR,%ecx
+	rdmsr
+	movl	%eax,ACPI_SUSPEND_LSTAR(%r8)
+
+	movl	$MSR_CSTAR,%ecx
+	rdmsr
+	movl	%eax,ACPI_SUSPEND_CSTAR(%r8)
+
+	movl	$MSR_SFMASK,%ecx
+	rdmsr
+	movl	%eax,ACPI_SUSPEND_SFMASK(%r8)
+
 	sgdt	ACPI_SUSPEND_GDT(%r8)
 	sidt	ACPI_SUSPEND_IDT(%r8)
 	sldt	ACPI_SUSPEND_LDT(%r8)
Index: arch/amd64/amd64/genassym.cf
===================================================================
RCS file: /cvsroot/src/sys/arch/amd64/amd64/genassym.cf,v
retrieving revision 1.70
diff -u -r1.70 genassym.cf
--- arch/amd64/amd64/genassym.cf	12 Aug 2018 15:31:01 -0000	1.70
+++ arch/amd64/amd64/genassym.cf	18 Nov 2018 06:26:26 -0000
@@ -267,7 +267,12 @@
 define	ACPI_SUSPEND_FS		offsetof(struct cpu_info, ci_suspend_fs)
 define	ACPI_SUSPEND_GS		offsetof(struct cpu_info, ci_suspend_gs)
 define	ACPI_SUSPEND_KGS	offsetof(struct cpu_info, ci_suspend_kgs)
+define	ACPI_SUSPEND_APICBASE	offsetof(struct cpu_info, ci_suspend_apicbase)
 define	ACPI_SUSPEND_EFER	offsetof(struct cpu_info, ci_suspend_efer)
+define	ACPI_SUSPEND_STAR	offsetof(struct cpu_info, ci_suspend_star)
+define	ACPI_SUSPEND_LSTAR	offsetof(struct cpu_info, ci_suspend_lstar)
+define	ACPI_SUSPEND_CSTAR	offsetof(struct cpu_info, ci_suspend_cstar)
+define	ACPI_SUSPEND_SFMASK	offsetof(struct cpu_info, ci_suspend_sfmask)
 define	ACPI_SUSPEND_REG	offsetof(struct cpu_info, ci_suspend_reg)
 define	ACPI_SUSPEND_CR0	offsetof(struct cpu_info, ci_suspend_cr0)
 define	ACPI_SUSPEND_CR2	offsetof(struct cpu_info, ci_suspend_cr2)
Index: arch/amd64/amd64/machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/amd64/amd64/machdep.c,v
retrieving revision 1.322
diff -u -r1.322 machdep.c
--- arch/amd64/amd64/machdep.c	15 Nov 2018 04:59:02 -0000	1.322
+++ arch/amd64/amd64/machdep.c	18 Nov 2018 06:26:27 -0000
@@ -1730,12 +1730,13 @@
 	 * Page 1:	BIOS callback (not used yet, for symmetry with i386)
 	 * Page 2:	MP bootstrap code (MP_TRAMPOLINE)
 	 * Page 3:	ACPI wakeup code (ACPI_WAKEUP_ADDR)
-	 * Page 4:	Temporary page table for 0MB-4MB
-	 * Page 5:	Temporary page directory
-	 * Page 6:	Temporary page map level 3
-	 * Page 7:	Temporary page map level 4
+	 * Page 4:	ACPI wakeup data (ACPI_WAKEUP_DATA)
+	 * Page 5:	Temporary page table for 0MB-4MB
+	 * Page 6:	Temporary page directory
+	 * Page 7:	Temporary page map level 3
+	 * Page 8:	Temporary page map level 4
 	 */
-	lowmem_rsvd = 8 * PAGE_SIZE;
+	lowmem_rsvd = 9 * PAGE_SIZE;
 
 	/* Initialize the memory clusters (needed in pmap_boostrap). */
 	init_x86_clusters();
Index: arch/x86/acpi/acpi_wakeup.c
===================================================================
RCS file: /cvsroot/src/sys/arch/x86/acpi/acpi_wakeup.c,v
retrieving revision 1.49
diff -u -r1.49 acpi_wakeup.c
--- arch/x86/acpi/acpi_wakeup.c	23 Sep 2017 10:38:59 -0000	1.49
+++ arch/x86/acpi/acpi_wakeup.c	18 Nov 2018 06:26:33 -0000
@@ -143,20 +143,17 @@
 
 	memcpy((void *)acpi_wakeup_vaddr, wakecode, sizeof(wakecode));
 
-	if (CPU_IS_PRIMARY(ci)) {
-		WAKECODE_FIXUP(WAKEUP_vesa_modenum, uint16_t, acpi_md_vesa_modenum);
-		WAKECODE_FIXUP(WAKEUP_vbios_reset, uint8_t, acpi_md_vbios_reset);
-		WAKECODE_FIXUP(WAKEUP_beep_on_reset, uint8_t, acpi_md_beep_on_reset);
-	} else {
-		WAKECODE_FIXUP(WAKEUP_vesa_modenum, uint16_t, 0);
-		WAKECODE_FIXUP(WAKEUP_vbios_reset, uint8_t, 0);
-		WAKECODE_FIXUP(WAKEUP_beep_on_reset, uint8_t, 0);
-	}
-
 #ifdef __i386__
 	WAKECODE_FIXUP(WAKEUP_r_cr4, uint32_t, ci->ci_suspend_cr4);
 #endif
+// +#if NLAPIC > 0
+	WAKECODE_FIXUP(WAKEUP_apicbase, uint32_t, ci->ci_suspend_apicbase);
+// +#endif
 	WAKECODE_FIXUP(WAKEUP_efer, uint32_t, ci->ci_suspend_efer);
+	WAKECODE_FIXUP(WAKEUP_star, uint32_t, ci->ci_suspend_star);
+	WAKECODE_FIXUP(WAKEUP_lstar, uint32_t, ci->ci_suspend_lstar);
+	WAKECODE_FIXUP(WAKEUP_cstar, uint32_t, ci->ci_suspend_cstar);
+	WAKECODE_FIXUP(WAKEUP_sfmask, uint32_t, ci->ci_suspend_sfmask);
 	WAKECODE_FIXUP(WAKEUP_curcpu, void *, ci);
 #ifdef __i386__
 	WAKECODE_FIXUP(WAKEUP_r_cr3, uint32_t, tmp_pdir);
Index: arch/x86/include/cpu.h
===================================================================
RCS file: /cvsroot/src/sys/arch/x86/include/cpu.h,v
retrieving revision 1.98
diff -u -r1.98 cpu.h
--- arch/x86/include/cpu.h	5 Oct 2018 18:51:52 -0000	1.98
+++ arch/x86/include/cpu.h	18 Nov 2018 06:26:33 -0000
@@ -197,7 +197,12 @@
 	uintptr_t	ci_suspend_fs;
 	uintptr_t	ci_suspend_gs;
 	uintptr_t	ci_suspend_kgs;
+	uintptr_t	ci_suspend_apicbase;
 	uintptr_t	ci_suspend_efer;
+	uintptr_t	ci_suspend_star;
+	uintptr_t	ci_suspend_lstar;
+	uintptr_t	ci_suspend_cstar;
+	uintptr_t	ci_suspend_sfmask;
 	uintptr_t	ci_suspend_reg[12];
 	uintptr_t	ci_suspend_cr0;
 	uintptr_t	ci_suspend_cr2;
Index: arch/x86/x86/pmap.c
===================================================================
RCS file: /cvsroot/src/sys/arch/x86/x86/pmap.c,v
retrieving revision 1.310
diff -u -r1.310 pmap.c
--- arch/x86/x86/pmap.c	7 Nov 2018 07:14:51 -0000	1.310
+++ arch/x86/x86/pmap.c	18 Nov 2018 06:26:34 -0000
@@ -4665,10 +4665,10 @@
 {
 	static bool maps_loaded;
 	static const paddr_t x86_tmp_pml_paddr[] = {
-	    4 * PAGE_SIZE,	/* L1 */
-	    5 * PAGE_SIZE,	/* L2 */
-	    6 * PAGE_SIZE,	/* L3 */
-	    7 * PAGE_SIZE	/* L4 */
+	    5 * PAGE_SIZE,	/* L1 */
+	    6 * PAGE_SIZE,	/* L2 */
+	    7 * PAGE_SIZE,	/* L3 */
+	    8 * PAGE_SIZE	/* L4 */
 	};
 	static vaddr_t x86_tmp_pml_vaddr[] = { 0, 0, 0, 0 };
 
